Files
Maven/vendor/modernc.org/libc/asm_386.s
T
kami 6c92f85d10 feat(ecosystem): compliant Praxis/Hexis integration + vendored build
Bring the Nexus/Praxis/Hexis integration in line with
MAVEN_ECOSYSTEM_ARCHITECTURE.md:

- Praxis over HTTP: drop the in-process praxis.db open (praxisstore/
  praxistools) and call praxisd's /api/v1/tools/* API via a new praxisClient.
  Honors the "no component reads another's DB" invariant (AC#12).
  PraxisConfig.DBPath -> URL.
- Hexis confirmation gate: mutating capabilities (ReadOnly=false) now park a
  bound pendingHexis confirmation and require a spoken "да" before executing;
  read-only run immediately (AC#7, no auto attention->action).
- Capability safety: >1 verb match is ambiguous -> ask instead of firing the
  first; ambiguous Nexus resolution asks for clarification (AC#2).
- Correlation IDs on Hexis execute, recorded in the cross-service trace.
- Bug: importance arrives as JSON float64 over HTTP, not int.
- Tests: confirm-gate, decline, read-only, and ambiguity paths.

Build: vendor/ bakes in the hexis client (replace-directed at a sibling repo
outside the Docker context); Dockerfile builds from vendor and no longer
`go mod download`s the unreachable replace paths.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
2026-07-19 20:24:33 +04:00

78 lines
1.4 KiB
ArmAsm

#include "textflag.h"
// static inline void a_or_64(volatile uint64_t *p, uint64_t v)
TEXT ·a_or_64(SB),NOSPLIT,$0
MOVL p+0(FP), BX
MOVL v+4(FP), AX
LOCK
ORL AX, 0(BX)
MOVL v+8(FP), AX
LOCK
ORL AX, 4(BX)
RET
// static inline void a_and_64(volatile uint64_t *p, uint64_t v)
TEXT ·a_and_64(SB),NOSPLIT,$0
MOVL p+0(FP), BX
MOVL v+4(FP), AX
LOCK
ANDL AX, 0(BX)
MOVL v+8(FP), AX
LOCK
ANDL AX, 4(BX)
RET
// static inline int a_cas(volatile int *p, int t, int s)
TEXT ·a_cas(SB),NOSPLIT,$0
MOVL p+0(FP), BX
MOVL t+4(FP), AX
MOVL s+8(FP), CX
LOCK
CMPXCHGL CX, 0(BX)
MOVL AX, ret+12(FP)
RET
// static inline void a_barrier()
TEXT ·a_barrier(SB),NOSPLIT,$0
MFENCE
RET
// #define a_crash a_crash
// static inline void a_crash()
// {
// __asm__ __volatile__( "hlt" : : : "memory" );
// }
TEXT ·a_crash(SB),NOSPLIT,$0
HLT
// static inline void *a_cas_p(volatile void *p, void *t, void *s)
TEXT ·a_cas_p(SB),NOSPLIT,$0
MOVL p+0(FP), BX
MOVL t+4(FP), AX
MOVL s+8(FP), CX
LOCK
CMPXCHGL CX, 0(BX)
MOVL AX, ret+12(FP)
RET
// static inline void a_or(volatile int *p, int v)
TEXT ·a_or(SB),NOSPLIT,$0
MOVL p+0(FP), BX
MOVL v+4(FP), AX
LOCK
ORL AX, 0(BX)
RET
// static inline int a_fetch_add(volatile int *p, int v)
TEXT ·a_fetch_add(SB),NOSPLIT,$0
MOVL p+0(FP), BX
MOVL v+4(FP), AX
LOCK
XADDL AX, 0(BX)
RET
// static inline void a_spin()
TEXT ·a_spin(SB),NOSPLIT,$0
PAUSE
RET