feat: scaffold cross-session router memory (L3) with turbovec sidecar

Defines the L3MemoryStore contract in core:router (entry, query, hit,
in-memory test default) and a new infrastructure:router:turbovec module
that adapts turbovec via a Python sidecar over stdin/stdout JSON-Lines.

Adapter manages the subprocess via ProcessBuilder with lazy start,
mutex-serialized requests, and shutdown via withTimeout. Wire-format
metadata that turbovec doesn't store (sessionId, turnId, text) is kept
in an in-memory map for now — durable persistence ships with the
upcoming ChatTurnEvent.

Not yet wired into RouterFacade, InfrastructureModule, or DI. Embedding
generation source is a separate concern.

settings.gradle

@@ -32,6 +32,8 @@ include ':infrastructure:persistence'
 include ':infrastructure:inference'
 include ':infrastructure:inference:commons'
 include ':infrastructure:inference:llama_cpp'
+include ':infrastructure:router'
+include ':infrastructure:router:turbovec'
 include ':infrastructure:tools'
 include ':infrastructure:tools:filesystem'
 include ':infrastructure:workflow'