feat(kernel): brief echo-back gate (plan-pipeline-addenda A1)
New brief_echo stage before the planner in role_pipeline: the model restates the analyst brief as a structured artifact, and a deterministic gate (checkBriefEcho, opt-in via brief_echo=true) diffs the restatement against the original brief. On divergence — dropped requirements (Jaccard coverage < 0.34) or hallucinated files — it emits BriefEchoMismatchEvent and fails the stage retryably, so a misread brief never reaches plan generation. The diff (BriefEchoDiff) is a pure function of two recorded artifacts, so it is replay-safe and records no observation; the event fires only on mismatch, for audit. Symbols are recorded but non-blocking in v1. Mirrors the groundBrief- References gate. role_pipeline only; freestyle_planning wiring is a follow-up. Runtime install (like research): copy brief_echo.json + brief_echo.md and the [[artifacts]] block into ~/.config/correx.
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You are about to plan. Before you do, RESTATE the analyst brief faithfully as JSON.
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Rules:
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- Copy requirements exactly — do not merge, drop, or reword them.
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- Only reference files that are explicitly named in the brief.
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- Do not invent new scope, new files, or new symbols.
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Emit your result as the `brief_echo` artifact (JSON, schema provided):
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- `goal`: the brief's goal in your own words (one sentence).
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- `referenced_files`: workspace-relative file paths named in the brief, verbatim.
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- `referenced_symbols`: class, interface, or function names named in the brief, verbatim.
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- `acceptance_criteria`: every requirement / acceptance criterion from the brief, one per item, verbatim.
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If a field has no relevant content, emit an empty array. Do not add items that are not in the brief.
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