Files
correx/infrastructure/router/AGENTS.md
T
kami d26f20c316 docs(dox): build out the DOX AGENTS.md hierarchy
Root Child DOX Index assembled, plus a per-module AGENTS.md across the tree
(core/*, infrastructure/*, apps/*, testing/*, and docs/examples/frontend/etc),
each following the DOX section shape: Purpose, Ownership, Local Contracts,
Work Guidance, Verification, Child DOX Index.
2026-06-28 20:43:27 +04:00

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1.4 KiB
Markdown

# infrastructure/router/
## Purpose
Router infrastructure adapters. Currently contains one submodule: `turbovec/`, which provides `TurboVecL3MemoryStore` — a durable L3 (cross-session) memory store backed by a Python TurboVec sidecar process communicating over stdio.
## Ownership
Adapter for `core:router` L3 memory interfaces. No source in the root `router/` module itself; all code lives in `turbovec/`.
## Local Contracts
- `TurboVecL3MemoryStore` implements `L3MemoryStore` from `core:router`.
- The TurboVec sidecar is a Python process; `SidecarProtocol` defines the stdio JSON message protocol.
- The bundled `turbovec_sidecar.py` script is extracted from the classpath to `~/.cache/correx/` at startup by `InfrastructureModule`.
- Similarity search results are environment observations (ANN index query); callers must record retrieved memories as events if replay correctness requires them (invariant #9).
- `TurboVecSidecarConfig` is the only configuration surface.
## Work Guidance
Standard adapter rules apply (see parent `AGENTS.md`). Sidecar communication is async; never block the calling coroutine waiting for the process without `withContext(Dispatchers.IO)`.
## Verification
```
./gradlew :infrastructure:router:turbovec:test --rerun-tasks
```
## Child DOX Index
- `turbovec/``TurboVecL3MemoryStore`, `SidecarProtocol`, `TurboVecSidecarConfig`; no separate AGENTS.md (sub-leaf, covered by this doc)